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Cabinet Approves India Semiconductor Mission 2.0 with ₹1.27 Lakh Crore Outlay

The Union Cabinet recently approved the second iteration of the India Semiconductor Mission (Semicon 2.0) with an outlay of ₹1.27 lakh crore. The 12-year policy provides tiered financial incentives for chip sales, domestic sourcing, and R&D. It marks a strategic shift from basic assembly to a complete semiconductor ecosystem, targeting self-reliance in a critical sector. For aspirants, this highlights India's push towards technological sovereignty, directly relevant to economic development and indigenisation of technology syllabi.

What Happened

On July 15, 2026, the Union Cabinet chaired by PM Narendra Modi approved the India Semiconductor Mission 2.0 (Semicon 2.0). The 12-year program receives a massive ₹1.27 lakh crore budget. The immediate trigger is to expand India's capabilities beyond chip assembly into chip design, raw material production, and intellectual property creation, addressing the global demand for supply chain diversification.

When & Where

The approval took place in New Delhi on July 15, 2026. Facilities under the mission will be established across various states, building on the existing footprint in Gujarat, Assam, and Uttar Pradesh. Globally, this positions India as a counterweight in a market currently dominated by East Asian countries.

Who Is Involved

  • Union Cabinet (CCEA): Granted the financial clearance for the ₹1.27 lakh crore outlay.
  • Ministry of Electronics and Information Technology (MeitY): The nodal ministry steering the execution of ISM.
  • Domestic & Global Tech Firms: Companies like Tata Electronics, Micron, and Kaynes are actively investing in facilities under this broader vision.
  • Academic Institutions: 315 universities are involved in training over 68,000 students in Electronic Design Automation (EDA).

How It Works

1. Tiered Subsidies: Instead of a flat rate, silicon fabs receive a 40% capital subsidy, while advanced packaging receives 35%.
2. Sales Incentives: Manufacturers get 2.25% to 5% incentives on eligible sales of locally made chips.
3. Ecosystem Support: Additional incentives of up to 1.5% are provided if companies source raw materials domestically.
4. R&D Boost: A 3% bonus incentive is available for companies investing in research to build indigenous Indian brands.
5. Six-Pillar Strategy: Focuses comprehensively on design, equipment/materials, fabs, packaging (ATMP), advanced R&D, and talent generation.

Why It Matters

  • Economic Impact: It aims to attract ₹4 lakh crore in investments and generate ₹2 lakh crore in semiconductor production, boosting GDP and creating high-skill jobs.
  • Strategic Autonomy: Reduces reliance on imports, securing supply chains for critical sectors like defence, telecom, and artificial intelligence.
  • Syllabus Link: Highly relevant for UPSC GS Paper 3 (Economy, Science & Technology, Indigenisation of Technology) and GS Paper 2 (Government Policies).

Historical Background

📌 [BACKGROUND — verify independently]

  • 2021: Launch of the first India Semiconductor Mission (ISM 1.0) with an outlay of ₹76,000 crore to kickstart the ecosystem.
  • 2023: Micron Technology announced an $825 million investment for an ATMP facility in Gujarat, signaling early success of ISM 1.0.
  • 2024: Tata Electronics partnered with Taiwan's PSMC to establish India's first commercial semiconductor fab in Dholera, Gujarat.

Previous Related Events

📌 [BACKGROUND — verify independently]

  • March 2026: Inauguration of the Kaynes Semicon OSAT facility in Sanand, Gujarat, focusing on chips for electric vehicles.
  • July 2026: Alongside Semicon 2.0, the Cabinet also approved a ₹62,500 crore Mobile Phone Manufacturing Scheme (MPMS).
  • Recent Budgets: Continuous reduction of import duties on mobile and electronic components to ease domestic manufacturing burdens.

Static GK Connection

  • Semiconductor Basics: Materials like Silicon and Germanium that have electrical conductivity between a conductor and an insulator, forming the foundation of modern electronics.
  • Supply Chain Resilience: An economic principle where nations diversify sourcing to prevent disruptions, a key driver behind policies like "China Plus One".

India & World Comparison

India currently imports the vast majority of its semiconductor requirements. Globally, Taiwan controls over 60% of the contract manufacturing market, while the US and South Korea dominate design and memory chips respectively. Semicon 2.0 aims to elevate India from a consumer to an active player in this high-tech global oligopoly.

Future Impact

  • Target 2030: Achieving 75% domestic self-sufficiency in semiconductor demand.
  • Target 2035: Establishing India among the top semiconductor nations globally.
  • Workforce Transition: An estimated 70% of roles in the sector will shift toward design and advanced packaging by 2030, necessitating massive upskilling.

🔑 Key Points for Revision

  • Semicon 2.0 approved with ₹1.27 lakh crore for 12 years.
  • Launched on July 15, 2026, by the Union Cabinet.
  • MeitY is the nodal ministry.
  • Offers 2.25% to 5% incentives on eligible sales.
  • Provides 40% capital subsidy for silicon fabs; 35% for other fabs.
  • Extra 1.5% incentive for domestic sourcing; 3% for R&D.
  • Semicon 2.0 expands focus from assembly to a 6-pillar ecosystem.
  • ISM 1.0 launched in 2021 with ₹76,000 crore budget.
  • Targets ₹4 lakh crore new investments and ₹2 lakh crore in production.
  • 12 projects were approved under ISM 1.0 (Tata, Micron, etc.).
  • Focuses on 75% domestic self-sufficiency by 2030.
  • Aims to make India a top semiconductor nation by 2035.
  • Connects deeply with "Make in India" and GS3 Indigenisation.
  • Operates alongside the ₹62,500-crore Mobile Phone Manufacturing Scheme.
  • Addresses global vulnerabilities exposed by recent memory chip shortages.

🧠 Concept Link (Static GK Deep Dive)

Core Concept: Semiconductor Manufacturing Ecosystem

  • Definition: The complete value chain required to produce microchips, encompassing chip design, raw material extraction, fabrication (fabs), and packaging (ATMP/OSAT).
  • Constitutional / Legal Basis: Governed under the executive powers of the Union (Article 73) and implemented via MeitY guidelines.
  • Scientific / Economic Principle: Moore's Law and Economies of Scale; shrinking transistor sizes requires massive capital expenditure, leading to natural oligopolies.
  • How it connects to this event: Semicon 2.0 provides the capital subsidy and policy longevity required to build this capital-intensive ecosystem in India.
  • Origin & History: India's serious push began with the National Policy on Electronics (NPE) 2019, followed by ISM 1.0 in 2021.
  • Key milestone 1: 2021 — Launch of ISM 1.0 with a ₹76,000 crore outlay.
  • Key milestone 2: 2024 — Approval of Tata Electronics' commercial fab in Dholera, Gujarat.
  • Related Acts / Schemes / Treaties: Production Linked Incentive (PLI) for Large Scale Electronics, Design Linked Incentive (DLI) scheme.
  • Nodal Ministry / Body: Ministry of Electronics and Information Technology (MeitY) and the India Semiconductor Mission (ISM) as an independent business division.
  • India-specific relevance: Crucial for reducing the massive import bill for electronics and preventing supply shocks in critical infrastructure.
  • Global comparison: Competing against massive global subsidies like the US CHIPS Act ($52 billion) and the European Chips Act.
  • Data point: India targets designing and manufacturing chips for 70-75% of domestic applications by 2029.
  • Common exam angle: UPSC frequently tests the distinction between fab manufacturing and packaging (ATMP/OSAT), and the strategic need for domestic capabilities.
  • Easy memory hook: "Design, Fabs, and Packaging — the holy trinity of a Semiconductor ecosystem."

❓ Practice MCQs

Q1. What is the total financial outlay approved by the Union Cabinet for the India Semiconductor Mission 2.0? [Easy]

A) ₹76,000 crore

B) ₹1.05 lakh crore

C) ₹1.27 lakh crore

D) ₹2.50 lakh crore

Answer: C

Explanation: The Cabinet approved Semicon 2.0 with a total outlay of ₹1.27 lakh crore over a 12-year period.


Q2. Which Union Ministry is primarily responsible for implementing the India Semiconductor Mission? [Easy]

A) Ministry of Science and Technology

B) Ministry of Electronics and Information Technology (MeitY)

C) Ministry of Commerce and Industry

D) Ministry of Heavy Industries

Answer: B

Explanation: MeitY is the nodal ministry steering the India Semiconductor Mission and its related policies.


Q3. Under Semicon 2.0, what is the capital subsidy provided for setting up silicon fabrication plants (fabs)? [Moderate]

A) 25%

B) 35%

C) 40%

D) 50%

Answer: C

Explanation: The scheme provides a 40% capital subsidy for silicon fabs, a reduction from the uniform 50% subsidy under ISM 1.0.


Q4. Semicon 2.0 provides an additional incentive of 3% on eligible sales for which specific activity? [Moderate]

A) Domestic sourcing of raw materials

B) Establishing facilities in Special Economic Zones (SEZs)

C) Employing more than 10,000 workers

D) Building Indian brands through Research & Development (R&D)

Answer: D

Explanation: The policy offers an additional 3% incentive on eligible sales directed at design and R&D for building Indian brands.


Q5. India Semiconductor Mission 2.0 shifts its focus towards which of the following areas compared to ISM 1.0? [Moderate]

A) Moving entirely away from semiconductor manufacturing to focus solely on software.

B) Expanding beyond assembly to a six-pillar strategy including chip design and materials.

C) Providing 100% subsidies to foreign companies.

D) Focusing exclusively on exporting raw minerals.

Answer: B

Explanation: Semicon 2.0 expands the mission into a comprehensive six-pillar strategy covering the entire value chain, including design, materials, and advanced packaging.


Q6. Consider the targets set for India's semiconductor industry. By which year does India aim to achieve 70-75% domestic self-sufficiency in semiconductor demand? [Tricky]

A) 2028

B) 2030

C) 2035

D) 2047

Answer: B

Explanation: The scheme sets a target of reaching 75% domestic self-sufficiency in semiconductor demand by the year 2030.


Q7. Which of the following is NOT one of the six pillars of the Semicon 2.0 strategy? [Tricky]

A) Chip design and intellectual property development

B) Incentivising machines and materials for chip production

C) Complete nationalisation of all electronic manufacturing facilities

D) Talent development and training in universities

Answer: C

Explanation: Complete nationalisation is not a pillar; the six pillars involve design, materials, fabs, packaging, R&D, and talent development through private and global collaboration.


Q8. How does the incentive structure for domestic sourcing in Semicon 2.0 function? [Tricky]

A) It mandates that 100% of materials must be sourced locally.

B) It provides an additional incentive of up to 1.5% linked to domestic sourcing of key components.

C) It penalises companies heavily for any imported component.

D) It replaces the sales incentive entirely.

Answer: B

Explanation: The scheme provides an additional tier of up to 1.5% incentive for companies that source key components and sub-assemblies domestically.


📜 Previous Year Question Style (PYQ)

PYQ 1:

With reference to India's push for electronic manufacturing, what was the initial outlay of the first phase of the India Semiconductor Mission (ISM 1.0) launched in 2021?

A) ₹50,000 crore

B) ₹76,000 crore

C) ₹1.00 lakh crore

D) ₹1.27 lakh crore

Answer: B

Explanation: The first iteration of the India Semiconductor Mission (ISM 1.0) was launched with an outlay of ₹76,000 crore.


PYQ 2:

Consider the following statements regarding the Semicon 2.0 programme:

1. It offers a uniform capital subsidy of 50% across all types of semiconductor fabrication and packaging plants.
2. It provides differentiated financial incentives on eligible sales ranging from 2.25% to 5%.
3. The programme focuses on creating an entire ecosystem, including incentivising the supply of raw materials and gases used in chip production.

Which of the above statements is/are correct?

A) 1 and 2 only

B) 2 and 3 only

C) 1 and 3 only

D) 1, 2, and 3

Answer: B

Explanation: Statement 1 is incorrect because Semicon 2.0 slashed the uniform 50% subsidy of ISM 1.0, offering 40% for silicon fabs and 35% for other fabs. Statements 2 and 3 are correct.


PYQ 3:

Assertion (A): The Semicon 2.0 mission allocates specific focus and funding toward chip design, intellectual property creation, and talent development.

Reason (R): Moving beyond mere chip assembly into design and R&D is essential for capturing higher economic value in the global semiconductor supply chain.

A) Both A and R are true, and R is the correct explanation of A.

B) Both A and R are true, but R is NOT the correct explanation of A.

C) A is true, but R is false.

D) A is false, but R is true.

Answer: A

Explanation: Both statements are true. Semicon 2.0 specifically targets the higher ends of the value chain (design and IP) precisely because that is where the most economic value and strategic leverage lie.


✍️ Mains Answer Pointers

Question 1 (150 words): Analyze the significance of transitioning from the India Semiconductor Mission 1.0 to Semicon 2.0 in the context of India's strategic autonomy.

The transition from ISM 1.0 to Semicon 2.0 marks a critical maturation in India's pursuit of technological sovereignty. While the ₹76,000 crore ISM 1.0 successfully laid the groundwork by attracting basic assembly and testing (ATMP) facilities, it left India vulnerable at higher ends of the value chain.

Semicon 2.0, with its massive ₹1.27 lakh crore outlay, addresses this by targeting a complete, vertically integrated ecosystem. By offering tiered subsidies—such as 40% for silicon fabs and additional incentives for domestic sourcing and R&D—the policy actively encourages intellectual property creation and raw material indigenisation. Economically, this limits the massive import bill for electronics, while strategically, it protects critical sectors like telecommunications and defence from global supply shocks. Ultimately, robust implementation and sustained R&D focus are vital if India is to meet its ambitious target of 75% domestic self-sufficiency by 2030.


Question 2 (250 words): "Building a domestic semiconductor ecosystem requires more than just capital subsidies; it demands an integrated approach across the value chain." In light of this statement, evaluate the six-pillar strategy of the Semicon 2.0 programme.

The semiconductor industry is notoriously capital-intensive and highly oligopolistic, dominated by a few East Asian and Western nations. Historically, India's electronics sector suffered from deep import dependence, lacking the massive infrastructure and specialised talent required for chip fabrication. The approval of Semicon 2.0, backed by a ₹1.27 lakh crore outlay, reflects a profound policy shift from merely subsidising factory construction to nurturing an integrated ecosystem.

The six-pillar strategy of Semicon 2.0 is a comprehensive blueprint designed to capture value at every stage of production. First, its focus on chip design and IP aims to retain high-value technological ownership within India. Second, by incentivising the domestic production of critical machinery, chemicals, and gases, the policy addresses upstream supply chain vulnerabilities. Third and fourth, the tiered capital subsidies—40% for silicon fabs and 35% for advanced packaging—ensure that both cutting-edge fabrication and essential packaging (ATMP/OSAT) are economically viable. Finally, the emphasis on R&D for smaller technology nodes and massive talent development (training 68,000 students via EDA tools) addresses the critical human capital deficit.

However, challenges remain in execution, particularly regarding uninterrupted power supply, massive water requirements, and technology transfer delays. To succeed in its goal of achieving 75% domestic self-sufficiency by 2030, India must ensure seamless inter-ministerial coordination and rapid infrastructural deployment, transforming policy intent into global manufacturing competitiveness.


⚠️ Examiner Trap

  • Trap 1: Students often confuse the uniform 50% subsidy of ISM 1.0 with the new structure. The correct fact is that under Semicon 2.0, the subsidy is tiered: 40% for silicon fabs and 35% for other fabs.
  • Trap 2: A common wrong assumption is that the mission is only about setting up giant fabrication plants. The reality is that Semicon 2.0 is a 6-pillar approach heavily stressing chip design, raw materials, and talent development, not just physical fabs.
  • Trap 3: Many students miss the exact timeline targets when answering questions on this topic. Always remember that the government targets 75% domestic self-sufficiency by 2030.

🧭 Exam Tip

For Prelims, examiners will heavily target the exact numerical figures: the ₹1.27 lakh crore outlay, the tiered subsidy percentages (40% vs 35%), and the 6-pillar framework. For Mains (GS3), expect analytical questions comparing the US CHIPS Act with India's approach, focusing on supply chain resilience and strategic autonomy. In Interviews, be prepared to discuss the environmental challenges (water and power intensity) of fabs and how India plans to overcome the severe talent shortage in advanced chip design. High-Probability Prediction: A PYQ-style statement question in UPSC Prelims contrasting the features of ISM 1.0 against Semicon 2.0 is highly likely in the upcoming cycle.


Perspective: Semicon 2.0 This video provides a detailed discussion on the policy shift from ISM 1.0 to Semicon 2.0 and its significance for India's strategic autonomy in electronics.